When high-frequency elements or semiconductor elements are die-bonded to a lead frame or the like to assemble a semiconductor device or electronic parts, Au-type brazing filler metals represented by Au/20 weight % Sn (20 weight % of Sn, and the remainder is Au), or a Pb-type brazing filler metal represented by Pb/5 weight % Sn (5 weight % of Sn, and the remainder is Pb), having a melting point of about 300° C., are used.
The reason why these brazing filler metals having a melting point of about 300° C. are used for die bonding is to prevent the brazing filler metal used at the time of die bonding from remelting to cause performance deterioration, when the assembled semiconductor device is mounted on a printed board under conditions of a temperature of from 240 to 260° C. and a heating period of 10 seconds or less. Moreover, in the assembly of electronic parts, these brazing filler metals are used so that the brazing filler metal used in a previous step does not remelt at the time of step brazing (at 220 to 260° C.) carried out in a subsequent step.
However, the Au-type brazing filler metal has a problem of being expensive, and the Pb-type brazing filler metal has a problem of environmental pollution. Hence, there is a demand for a brazing filler metal that does not contain Pb, is economical and capable of brazing at 300 to 340° C., with a melting temperature thereof being 260° C. or higher, and has excellent wettability.
In order to respond to such a demand, there has been proposed a soldering material containing at least one kind of Fe and Ni in an amount of from 0.005 to 5.0 weight %, and preferably, 0.1 to 20 weight % of Ag, or 0.05 to 9 weight % of Cu, or 0.1 to 15 weight % of Ag, and 0.05 to 5 weight % of Cu, and further containing 0.1 to 15 weight % of Sb, with the remainder being Sn substantially (see Japanese Patent Publication No. Tokukai 2001-144111).
Moreover, there is another proposal for a soldering material for die bonding, which contains 11.0 to 20.0 weight % of Sb, 0.01 to 0.2 weight % of P, and preferably, 0.005 to 5.0 weight % of at least one kind of Cu and Ni, with the balance being Sn and incidental impurities (see Japanese Patent Publication No. Tokukai 2001-284792).
These are proposed for resolving the disadvantage of Sn/Sb type solder having poor performance against thermal fatigue, and reducing a resistance change in a die-bonded portion which is placed at a high temperature when the semiconductor device is mounted by soldering on a printed board.
Incidentally, a multi-level metal layer such as Cr—Ni—Ag or Ti—Cu—Ag is provided on a bonding plane of the semiconductor element and the solder (hereinafter referred to as a “die bonding plane of a semiconductor element”), for improving the wettability with the solder. When an Sn/Sb type solder is used as the die bonding solder, Ag on the outermost surface of the multi-metal layer fuses with the soldering material to decrease the melting point of the soldering material excessively (see Paragraph No. 0006 in Japanese Patent Publication No. Tokukai 2001-196393). In order to solve this problem, there is proposed a method in which a first metallic coating and a second metallic coating are formed in this order on the die bonding plane of the semiconductor device, the second metallic coating is a coating containing tin or antimony, and an Sn/Sb type solder is used as a solder (see Paragraph No. 0008 in Japanese Patent Publication No. Tokukai 2001-196393).
Especially, when the heat output of the semiconductor element is large, an Sn-5 weight % Sb type solder is used in order to obtain high reliability. However, at this time there is a problem in that an intermediate metal layer such as Ni and Cu in the multi-metal layer reacts with the solder due to the heat at the time of operating the semiconductor device or application of stress, to form a hard and brittle intermetallic compound layer, and fracture progresses from this layer (see Paragraph Nos. 0005 to 0006, in Japanese Patent No. 3033378). In order to solve this problem there is described usage of an Sn/Sb type solder, by forming the outermost layer of the die bonding plane of the semiconductor element of Cr, Ti, Mo, W, Zr and Hf, or providing a surface metal layer comprising at least one kind of metal selected from the group consisting of Sn, Sb, Au, Ag, Pt, Ni, Cu, Zn, Al, Co, Fe and Pb on the metal layer (see Paragraph Nos. 0010 to 0011, in Japanese Patent No. 3033378).
According to the above described two methods, an excessive drop in the melting point of the solder can be prevented, or generation of a hard and brittle intermetallic compound layer can be prevented. However, it has been found that a new problem occurs in that a lot of voids are generated on the semiconductor element side in the solder layer after the die bonding. The presence of voids deteriorates the long-term reliability.
In the Sn/Sb type brazing filler metal heretofore provided, there are disadvantages that large grains in a β′ phase are likely to deposit and that cracks are likely to occur in the elements and the bonded portion, and moreover that voids are formed when the above described special coating is provided on the die bonding plane of the semiconductor element, and such disadvantages have not yet been overcome. Hence, it cannot be said that the Sn/Sb type brazing filler metal is adequate.
In view of the above situation, it is an object of the present invention to provide a novel Sn/Sb type brazing filler metal which does not contain Pb and is suitable for being used in die-bonding semiconductor elements or assembling electronic parts.